Gesytec HD-PLC Core

We implemented the HD-PLC technology without using any Echelon components or software. It is a combination of Megachips HD-PLC technology and Gesytec EPOS LON stack. Over the span of 10 years, Gesytec self-developed EPOS stack has been used in tens of thousands of our products together with our own transceiver. EPOS has been an ideal solution for realizing a LON node with HD-PLC as it is designed to use in systems with few resources.

MegaChip’s KHM1501 HD-PLC chip runs the LON protocol stack, which is powered by a cost-effective Cortex M0 CPU, a STM32F901 from ST, over a serial interface. The Cortex M0 CPU takes care of actual application and operates the peripherals. This separates the application from both the LON Stack and HD-PLC and avoids unwanted interactions. Ultimately, the application CPU can be chosen according to the requirements of each task to be solved.

The HD-PLC standard core of Gesytec provides these signals:


Row-A Row-B Comment
1 DAC_OUT1 DAC_OUT2 analog out
2 ADC_IN6 ADC_IN7 analog in
3 GND-A VCC-A analog supply
4 PA0 PA1 digital
5 PA2 PA3 digital
6 PB8 PB9 digital
7 PB10 PB11 digital
8 PB12 PB13 digital
9 PB14 PB15 digital
10 GND VCC digital supply
12 GND Reset ARM Debug
13 UART5_TX Reset diagnostics

The digital signals can be used to implement serial protocols such as UART, SPI, I2C and CAN.


0.9 M

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Rudolf Thiefes
phone: +49 2408 944-341